Field of the Invention
The invention relates to an integrated memory having an error correction function.
An error correction function for integrated memories (such as dynamic memories, DRAMs) is produced using so-called error correction codes (ECC). In the simplest case, a so-called parity check is carried out. Therefore, for each data word which is to be stored having a number of bits, one or more parity bits are produced and stored in the memory together with the data word. When the data word is read from the memory, the parity bits stored with it are evaluated, as a result of which, depending on the number of parity bits, one or more bit errors can be detected and also corrected, depending on the error correction code used. A simple and widely used error correction code is the Hamming code. Memories equipped with such an error correction function require additional storage space for storing the parity bits.
Hence, there are two types of memories. First, there are memories which are not provided with any error correction function and in which, accordingly, the storage requirement per data word corresponds exactly to the number of bits per data word. Second, there are memories that have an error correction function and have a storage requirement per data word that is increased by the parity bits, but which allow the correction of errors occurring during storage. The former memories are suitable for storing useful data that are insensitive to errors, such as audio data. The latter memories are suitable for applications in which the absence of errors is very important, as is the case of program memories, for example.